A lower bound on the area of permutation layouts

Alok Aggarwal*, Maria Klawe, David Lichtenstein, Nathan Linial, Avi Wigderson

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

10 Scopus citations


In this paper we prove a tight Ω(n 3) lower bound on the area of rectilinear grids which allow a permutation layout of n inputs and n outputs. Previously, the best lower bound for the area of permutation layouts with arbitrary placement of the inputs and outputs was Ω(n 2), though Cutler and Shiloach [CS] proved an Ω(n 2.5) lower bound for permutation layouts in which the set of inputs and the set of outputs each lie on horizontal lines. Our lower bound also holds for permutation layouts in multilayer grids as long as a fixed fraction of the paths do not change layers.

Original languageAmerican English
Pages (from-to)241-255
Number of pages15
Issue number1-6
StatePublished - Jun 1991


  • Grid embedding
  • Layout
  • Lower bound
  • Multilayer
  • Permutation
  • VLSI


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