Abstract
On a computer with just an add operation, a fast multiplication of m-word numbers p (the multiplier) and q (the multiplicand) is performed. The algorithm is such that if the same multiplicand q is reused, then further speedup is possible. A very limited amount of additional hardware is necessary to provide the expanded function. The algorithm was programmed for doing double-precision floating-point multiplication on the IBM System/3 and yielded considerable reduction in time, as compared to conventional programs.
| Original language | English |
|---|---|
| Pages (from-to) | 2134-2136 |
| Number of pages | 3 |
| Journal | IBM technical disclosure bulletin |
| Volume | 17 |
| Issue number | 7 |
| State | Published - 1974 |
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