Effect of instruction fetch bandwidth on value prediction

Freddy Gabbay*, Avi Mendelson

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

34 Scopus citations

Abstract

Value prediction attempts to eliminate true-data dependencies by dynamically predicting the outcome values of instructions and executing true-data dependent instructions based on that prediction. In this paper we attempt to understand the limitations of using this paradigm in realistic machines. We show that the instruction-fetch bandwidth and the issue rate have a very significant impact on the efficiency of value prediction. In addition, we study how recent techniques to improve the instruction-fetch rate affect the efficiency of value prediction and its hardware organization.

Original languageEnglish
Pages (from-to)272-281
Number of pages10
JournalConference Proceedings - Annual International Symposium on Computer Architecture, ISCA
DOIs
StatePublished - 1998
Externally publishedYes
EventProceedings of the 1998 25th Annual International Symposium on Computer Architecture - Barcelona, Spain
Duration: 27 Jun 19981 Jul 1998

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