TY - JOUR
T1 - Improving achievable ILP through value prediction and program profiling
AU - Gabbay, Freddy
AU - Mendelson, Avi
PY - 1998/11/30
Y1 - 1998/11/30
N2 - This paper explores the possibility of using program profiling to enhance the efficiency of value prediction. Value prediction attempts to eliminate true-data dependencies by predicting the outcome values of instructions at run-time and executing true-data dependent instructions based on that prediction. So far, all published techniques in this area have examined hardware-only value prediction mechanisms. In order to enhance the efficiency of value prediction, it is proposed that program profiling be employed to collect information that describes the tendency of instructions in a program to be value-predictable. The compiler that acts as a mediator passes this information to the value-prediction hardware mechanisms. Such information is exploited by the hardware in order to reduce mispredictions, better utilize the prediction table resources, distinguish between different value predictability patterns and still benefit from the advantages of value prediction to increase instruction-level parallelism. We show that the proposed method outperforms the hardware-only mechanisms in most of the examined benchmarks.
AB - This paper explores the possibility of using program profiling to enhance the efficiency of value prediction. Value prediction attempts to eliminate true-data dependencies by predicting the outcome values of instructions at run-time and executing true-data dependent instructions based on that prediction. So far, all published techniques in this area have examined hardware-only value prediction mechanisms. In order to enhance the efficiency of value prediction, it is proposed that program profiling be employed to collect information that describes the tendency of instructions in a program to be value-predictable. The compiler that acts as a mediator passes this information to the value-prediction hardware mechanisms. Such information is exploited by the hardware in order to reduce mispredictions, better utilize the prediction table resources, distinguish between different value predictability patterns and still benefit from the advantages of value prediction to increase instruction-level parallelism. We show that the proposed method outperforms the hardware-only mechanisms in most of the examined benchmarks.
KW - Instruction-level parallelism
KW - Program profiling
KW - Value prediction
UR - http://www.scopus.com/inward/record.url?scp=0032207059&partnerID=8YFLogxK
U2 - 10.1016/S0141-9331(98)00088-X
DO - 10.1016/S0141-9331(98)00088-X
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AN - SCOPUS:0032207059
SN - 0141-9331
VL - 22
SP - 315
EP - 332
JO - Microprocessors and Microsystems
JF - Microprocessors and Microsystems
IS - 6
ER -