TY - JOUR
T1 - Investigation of MOS Capacitors with Thin ZrO2 Layers and Various Gate Materials for Advanced DRAM Applications
AU - Shappir, Joseph
AU - Anis, Ayal
AU - Pinsky, Ida
PY - 1986/4
Y1 - 1986/4
N2 - Thin ZrO2 layers were used to realize MOS capacitors with aluminum, polysilicon, and molybdenum gate electrodes. The layers, 300–600 A in thickness, were obtained by metal organic chemical vapor deposition. The effects of various high-temperature treatments as well as gate material deposition conditions on the MOS capacitor properties were studied. Processing conditions compatible with standard silicon technology were established to obtain capacitors suitable for advanced DRAM application. Relative dielectric constant e ≥ 16, breakdown field EB≥ 3 MV/cm, and leakage currents at applied voltage of 5 V around 10-8 A/cm2 enable the realization of capacitors with dielectric layer equivalent to 35 A of SiO2.
AB - Thin ZrO2 layers were used to realize MOS capacitors with aluminum, polysilicon, and molybdenum gate electrodes. The layers, 300–600 A in thickness, were obtained by metal organic chemical vapor deposition. The effects of various high-temperature treatments as well as gate material deposition conditions on the MOS capacitor properties were studied. Processing conditions compatible with standard silicon technology were established to obtain capacitors suitable for advanced DRAM application. Relative dielectric constant e ≥ 16, breakdown field EB≥ 3 MV/cm, and leakage currents at applied voltage of 5 V around 10-8 A/cm2 enable the realization of capacitors with dielectric layer equivalent to 35 A of SiO2.
UR - http://www.scopus.com/inward/record.url?scp=0022706431&partnerID=8YFLogxK
U2 - 10.1109/T-ED.1986.22510
DO - 10.1109/T-ED.1986.22510
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AN - SCOPUS:0022706431
SN - 0018-9383
VL - 33
SP - 442
EP - 449
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 4
ER -