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Mission Profile-Driven Transistor Aging Modeling and Simulation Flow

  • Firas Ramadan*
  • , Maayan Ella
  • , Freddy Gabbay
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The impact of transistor aging on reliability has become increasingly critical with the rising trends of miniaturization and thermal density in modern integrated circuits (ICs). Aging simulations during the design stage are essential for predicting degradation over an IC's lifetime. However, conventional aging simulations typically assume fixed, worst-case operating conditions, leading to overly conservative aging margins. In this paper, we introduce a new model and a simulation flow that incorporate variable operating temperatures, accurately reflecting the mission profile of ICs in the field. By capturing the dynamic nature of real-world operating environments, our proposed approach enables more precise aging predictions and potentially reduces overdesign, thereby improving design efficiency and lowering power consumption.

Original languageEnglish
Title of host publication2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration, VLSI-SoC 2025
PublisherIEEE Computer Society
ISBN (Electronic)9798331598129
DOIs
StatePublished - 2025
Event33rd IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2025 - Puerto Varas, Chile
Duration: 12 Oct 202515 Oct 2025

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440

Conference

Conference33rd IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2025
Country/TerritoryChile
CityPuerto Varas
Period12/10/2515/10/25

Bibliographical note

Publisher Copyright:
© 2025 IEEE.

Keywords

  • Asymmetric Aging
  • BTI
  • Mission-Profile

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