The authors propose two new multilayer grid models for VLSI layout, both of which take into account the number of contact cuts used. For the first model, in which nodes exist on only one layer, a tight tradeoff area multiplied by (number of contact cuts) equals O(n**2) is proved for embedding any degree 4n-node planar graph in two layers. For the second models in which nodes exist simultaneously on all layers, a number of bounds on the area needed to embed graphs using no contact cuts are proved. For example, it is proved that any n-node graph which is the union of two planar subgraphs can be embedded on two layers in O(n**2) area without contact cuts. This bound is tight even if more layers and an unbounded number of contact cuts are allowed. It is also shown that planar graphs of bounded degree can be embedded on two layers in O(n**1**. **6) area without contact cuts.