PATTERN MATCHING AND PARALLEL PROCESSING WITH CCD TECHNOLOGY

Volnei A. Pedroni, Aharon Agranat, Charles Neugebauer, Amnon Yariv

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

13 Scopus citations

Abstract

A fully parallel CCD memory chip of N address lines is presented, which detects, in just one clock cycle, a perfect matching between an input pattern and any of Ae stored patterns, and detects, in less than N cycles, the best matching, in case a perfect one does not exist. This chip is suitable for applications in pattern recognition, Kanerva memories, data decoders, and other systems that require peak detection or Hamming distance calculation.

Original languageEnglish
Title of host publicationProceedings - 1992 International Joint Conference on Neural Networks, IJCNN 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages620-623
Number of pages4
ISBN (Electronic)0780305590
DOIs
StatePublished - 1992
Externally publishedYes
Event1992 International Joint Conference on Neural Networks, IJCNN 1992 - Baltimore, United States
Duration: 7 Jun 199211 Jun 1992

Publication series

NameProceedings of the International Joint Conference on Neural Networks
Volume3

Conference

Conference1992 International Joint Conference on Neural Networks, IJCNN 1992
Country/TerritoryUnited States
CityBaltimore
Period7/06/9211/06/92

Bibliographical note

Publisher Copyright:
©1992 IEEE

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