Abstract
A fully parallel CCD memory chip of N address lines is presented, which detects, in just one clock cycle, a perfect matching between an input pattern and any of Ae stored patterns, and detects, in less than N cycles, the best matching, in case a perfect one does not exist. This chip is suitable for applications in pattern recognition, Kanerva memories, data decoders, and other systems that require peak detection or Hamming distance calculation.
| Original language | English |
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| Title of host publication | Proceedings - 1992 International Joint Conference on Neural Networks, IJCNN 1992 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 620-623 |
| Number of pages | 4 |
| ISBN (Electronic) | 0780305590 |
| DOIs | |
| State | Published - 1992 |
| Externally published | Yes |
| Event | 1992 International Joint Conference on Neural Networks, IJCNN 1992 - Baltimore, United States Duration: 7 Jun 1992 → 11 Jun 1992 |
Publication series
| Name | Proceedings of the International Joint Conference on Neural Networks |
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| Volume | 3 |
Conference
| Conference | 1992 International Joint Conference on Neural Networks, IJCNN 1992 |
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| Country/Territory | United States |
| City | Baltimore |
| Period | 7/06/92 → 11/06/92 |
Bibliographical note
Publisher Copyright:©1992 IEEE