Abstract
In this paper we present a family of techniques for the design of combinational networks whose objective is the reduction of the number of levels, subject to a constraint on the fan-in of the logic gates. We show that a Boolean expression with n literals and involving the connectives AND and OR can be restructured so that the resulting network of AND and OR gates has depth at most Cl log2 n + δ, where δ < 0.415 and Cl is 1.81, 1.38, 1.18, and 1 for maximum fan-in l of 2, 3, 4, and 5, respectively. If we additionally require that the amount of equipment of the resulting network be bounded by a linear function of n, it is possible to bound the depth by 2 log2 n with a fan-in of at most 3.
| Original language | English |
|---|---|
| Pages (from-to) | 474-479 |
| Number of pages | 6 |
| Journal | IEEE Transactions on Computers |
| Volume | C-26 |
| Issue number | 5 |
| DOIs | |
| State | Published - May 1977 |
Keywords
- Boolean expressions
- combinational networks
- computational complexity
- design algorithms
- fan-in
- network depth
- number of levels
- parallel computation
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