Abstract
Emulators that translate algorithms from the shared-memory model to two different message-passing models are presented. Both are achieved by implementing a wait-free, atomic, single-writer multi-reader register in unreliable, asynchronous networks. The two message-passing models considered are a complete network with processor failures and an arbitrary network with dynamic link failures. These results make it possible to view the shared-memory model as a higher-level language for designing algorithms in asynchronous distributed systems. Any wait-free algorithn based on atomic, single-writer multi-reader registers can be automatically emulated in message-passing systems. The over-head introduced by these emulations is polynomial in the number of processors in the systems. Immediate new results are obtained by applying the emulators to known shared-memory algorithms.
Original language | English |
---|---|
Pages | 363-375 |
Number of pages | 13 |
DOIs | |
State | Published - 1990 |
Externally published | Yes |
Event | Proceedings of the 9th Annual ACM Symposium on Principles of Distributed Computing - Quebec City, Que, Can Duration: 22 Aug 1990 → 24 Aug 1990 |
Conference
Conference | Proceedings of the 9th Annual ACM Symposium on Principles of Distributed Computing |
---|---|
City | Quebec City, Que, Can |
Period | 22/08/90 → 24/08/90 |