A generic circuit, the charge controlled analog synapse (CCAS) is presented. The CCAS is designed to be the basic building block in microelectronic realizations of large scale artificial neural networks. It is based on representing the synaptic strength as a charge packet which controls the junction capacitance of a reverse biased diode. The CCAS is a synapse with three main features: (i) a small cell with few components per cell; (ii) a short term dynamic memory, and (iii) a variable accuracy which depends on the cell size. The principle of operation of the CCAS is explained. Details of the design of a first prototype are given. Experimental results which substantiate the theoretical predictions are presented. Finally, the basic properties of the CCAS are discussed.